| Date | Wed, 13 May 2015 17:29:28 -0700 | Subject | Re: [PATCH v5 18/21] clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate | From | Benson Leung <> |
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On Tue, May 12, 2015 at 10:24 AM, Rhyland Klein <rklein@nvidia.com> wrote: > This removes the conversion from pdiv to hw, which is already taken > care of by _get_table_rate before this code is run. This avoids > incorrectly converting pdiv to hw twice and getting the wrong hw value. > > Also set the input_rate in the freq cfg in _calc_dynamic_ramp_rate while > setting all the other fields. > > Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-by: Benson Leung <bleung@chromium.org>
-- Benson Leung Software Engineer, Chrom* OS bleung@chromium.org
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