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SubjectRe: [Intel-gfx] [PATCH 07/21] drm/i915: Check for eDP inside intel_edp_panel_vdd_on/off
On Thu, Sep 29, 2011 at 06:09:39PM -0700, Keith Packard wrote:
> Cleans up code dealing with eDP VDD a bit. Remove redundant checks in
> callers
>
> Signed-off-by: Keith Packard <keithp@keithp.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 20 ++++++++++----------
> 1 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index a983d0f..da725d8 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -832,6 +832,8 @@ static void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp)
> struct drm_i915_private *dev_priv = dev->dev_private;
> u32 pp;
>
> + if (!is_edp(intel_dp))
> + return;
> /*
> * If the panel wasn't on, make sure there's not a currently
> * active PP sequence before enabling AUX VDD.
> @@ -853,6 +855,8 @@ static void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp)
> struct drm_i915_private *dev_priv = dev->dev_private;
> u32 pp;
>
> + if (!is_edp(intel_dp))
> + return;
> pp = I915_READ(PCH_PP_CONTROL);
> pp &= ~PANEL_UNLOCK_MASK;
> pp |= PANEL_UNLOCK_REGS;
> @@ -1034,15 +1038,13 @@ static void intel_dp_commit(struct drm_encoder *encoder)
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> struct drm_device *dev = encoder->dev;
>
> - if (is_edp(intel_dp))
> - ironlake_edp_panel_vdd_on(intel_dp);
> + ironlake_edp_panel_vdd_on(intel_dp);
>
> intel_dp_start_link_train(intel_dp);
>
> - if (is_edp(intel_dp)) {
> + if (is_edp(intel_dp))
> ironlake_edp_panel_on(intel_dp);

Why not also move the id_edp check into edp_panel_on|off like for the vdd
functions? This way it looks a bit inconsistent ...
-Daniel
> - ironlake_edp_panel_vdd_off(intel_dp);
> - }
> + ironlake_edp_panel_vdd_off(intel_dp);
>
> intel_dp_complete_link_train(intel_dp);
>
> @@ -1070,15 +1072,13 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
> if (is_edp(intel_dp) && !is_pch_edp(intel_dp))
> ironlake_edp_pll_off(encoder);
> } else {
> - if (is_edp(intel_dp))
> - ironlake_edp_panel_vdd_on(intel_dp);
> + ironlake_edp_panel_vdd_on(intel_dp);
> intel_dp_sink_dpms(intel_dp, mode);
> if (!(dp_reg & DP_PORT_EN)) {
> intel_dp_start_link_train(intel_dp);
> - if (is_edp(intel_dp)) {
> + if (is_edp(intel_dp))
> ironlake_edp_panel_on(intel_dp);
> - ironlake_edp_panel_vdd_off(intel_dp);
> - }
> + ironlake_edp_panel_vdd_off(intel_dp);
> intel_dp_complete_link_train(intel_dp);
> }
> if (is_edp(intel_dp))
> --
> 1.7.6.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

--
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48


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