Messages in this thread | | | Subject | Re: PCI DMA to small buffers on cache-incoherent arch | From | Roland Dreier <> | Date | 10 Jun 2002 10:28:55 -0700 |
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>>>>> "Tom" == Tom Rini <trini@kernel.crashing.org> writes:
Roland> So is the consensus now that in general drivers should Roland> make sure any buffers passed to pci_map/unmap are aligned Roland> to SMP_CACHE_BYTES (and a multiple of SMP_CACHE_BYTES in Roland> size)? In other words if a driver uses an unaligned Roland> buffer it should be fixed unless we can prove (and Roland> document in a comment :) that it won't cause problems on Roland> an arch without cache coherency and with a writeback Roland> cache.
Tom> And how about we don't call it SMP_CACHE_BYTES too? The Tom> processors where this matters certainly aren't doing SMP...
Fair enough... there is of course L1_CACHE_BYTES but I'm not positive that's always the right thing. If we want to introduce a new constant then we will have to touch every arch (which is not necessarily a killer but it means "fixed" drivers won't compile for everyone until their arch is fixed).
What would you propose? I don't have strong feelings about the exact form of a solution but I would like to decide something so we can have a standard way of fixing drivers that use unaligned DMA buffers (and convincing maintainers to apply the patches).
Thanks, Roland
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