| Date | Tue, 13 May 2014 09:19:19 +0200 | Subject | Re: [PATCH v1 03/11] mmc: mmci: Add Qcom datactrl register variant | From | Linus Walleij <> |
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On Tue, Apr 29, 2014 at 10:19 AM, <srinivas.kandagatla@linaro.org> wrote:
> From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > > Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl > register. Bit postion datactrl[16:4] hold the true block size instead of power > of 2. > > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
This is probably something I got wrong when I attempted to use this driver on the Dragon board. Now I see what I missed...
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Yours, Linus Walleij
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