Messages in this thread | | | From | Pankaj Gupta <> | Subject | RE: [EXT] Re: [PATCH v4 1/7] dt-bindings: arm: fsl: add se-fw binding doc | Date | Mon, 24 Jul 2023 06:37:22 +0000 |
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> -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Sent: Thursday, July 13, 2023 12:05 AM > To: Conor Dooley <conor@kernel.org>; Pankaj Gupta > <pankaj.gupta@nxp.com> > Cc: shawnguo@kernel.org; s.hauer@pengutronix.de; kernel@pengutronix.de; > clin@suse.com; conor+dt@kernel.org; pierre.gondois@arm.com; Jacky Bai > <ping.bai@nxp.com>; Clark Wang <xiaoning.wang@nxp.com>; Wei Fang > <wei.fang@nxp.com>; Peng Fan <peng.fan@nxp.com>; Bough Chen > <haibo.chen@nxp.com>; festevam@gmail.com; dl-linux-imx <linux- > imx@nxp.com>; davem@davemloft.net; robh+dt@kernel.org; > krzysztof.kozlowski+dt@linaro.org; linux-arm-kernel@lists.infradead.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; Gaurav Jain > <gaurav.jain@nxp.com>; alexander.stein@ew.tq-group.com; Sahil Malhotra > <sahil.malhotra@nxp.com>; Aisheng Dong <aisheng.dong@nxp.com>; Varun > Sethi <V.Sethi@nxp.com> > Subject: [EXT] Re: [PATCH v4 1/7] dt-bindings: arm: fsl: add se-fw binding doc > > Caution: This is an external email. Please take care when clicking links or > opening attachments. When in doubt, report the message using the 'Report > this email' button > > > On 12/07/2023 20:26, Conor Dooley wrote: > > Hey, > > > > On Wed, Jul 12, 2023 at 05:42:13PM +0530, Pankaj Gupta wrote: > >> The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded secure > >> enclave within the SoC boundary to enable features like > >> - HSM > >> - SHE > >> - V2X > >> > >> Communicates via message unit with linux kernel. This driver is > >> enables communication ensuring well defined message sequence protocol > >> between Application Core and enclave's firmware. > >> > >> Driver configures multiple misc-device on the MU, for multiple > >> user-space applications can communicate on single MU. > >> > >> It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc. > >> > >> Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> > >> --- > >> .../bindings/arm/freescale/fsl,se-fw.yaml | 121 ++++++++++++++++++ > >> 1 file changed, 121 insertions(+) > >> create mode 100644 > >> Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml > >> > >> diff --git > >> a/Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml > >> b/Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml > >> new file mode 100644 > >> index 000000000000..7567da0b4c21 > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml > >> @@ -0,0 +1,121 @@ > >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 > >> +--- > >> +$id: > >> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdev > >> +icetree.org%2Fschemas%2Farm%2Ffreescale%2Ffsl%2Cse- > fw.yaml%23&data=0 > >> > +5%7C01%7Cpankaj.gupta%40nxp.com%7Cde3f4d12573845f8b7db08db830 > 6b165%7 > >> > +C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638247836986636 > 866%7CUnk > >> > +nown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik > 1ha > >> > +WwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=PUeKu1fQmYpTsN72LA > YGRS2daqnO > >> +gzATfe0ckNfYdik%3D&reserved=0 > > > > I think on v3 you were asked to use a filename that matches the > > compatibles? > > > >> +$schema: > >> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdev > >> +icetree.org%2Fmeta- > schemas%2Fcore.yaml%23&data=05%7C01%7Cpankaj.gupt > >> > +a%40nxp.com%7Cde3f4d12573845f8b7db08db8306b165%7C686ea1d3bc2 > b4c6fa92 > >> > +cd99c5c301635%7C0%7C0%7C638247836986636866%7CUnknown%7CTW > FpbGZsb3d8e > >> > +yJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D > %7C > >> > +3000%7C%7C%7C&sdata=tufHqsLbzUCQjGG9KzQ5dy1Htlk2gc2Ik5gEAFWym > %2FI%3D > >> +&reserved=0 > >> + > >> +title: NXP i.MX EdgeLock Enclave Firmware (ELEFW) > >> + > >> +maintainers: > >> + - Pankaj Gupta <pankaj.gupta@nxp.com> > > > >> + value, i.e., supported SoC(s) are imx8ulp, imx93. > > > >> + > >> +properties: > >> + compatible: > >> + enum: > >> + - fsl,imx-ele > > > > This looks like a generic compatible, not a specific one, but you use > > it on the imx8ulp. I would have expected that you would have something > > like "fsl,imx8ulp-ele" for that. > > Yeah, this one looks generic, so not what we expect.
This change left un-changed in V4. It is "fsl,se-fw", instead of "fsl,imx8ulp-ele". I will change in V5.
> > > > >> + - fsl,imx93-ele > > > > > >> + > >> + mboxes: > >> + description: > >> + A list of phandles of TX MU channels followed by a list of phandles of > >> + RX MU channels. The number of expected tx and rx channels is 1 TX, > and > >> + 1 RX channels. > > Don't repeat constraints in free form text. This is obvious from the items > below.
Removed the line till here.
> > > Best regards, > Krzysztof
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