Messages in this thread | | | Date | Mon, 3 Oct 2022 10:48:29 -0700 | From | Kees Cook <> | Subject | Re: [PATCH v2 06/39] x86/fpu: Add helper for modifying xstate |
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On Thu, Sep 29, 2022 at 03:29:03PM -0700, Rick Edgecombe wrote: > Just like user xfeatures, supervisor xfeatures can be active in the > registers or present in the task FPU buffer. If the registers are > active, the registers can be modified directly. If the registers are > not active, the modification must be performed on the task FPU buffer. > > When the state is not active, the kernel could perform modifications > directly to the buffer. But in order for it to do that, it needs > to know where in the buffer the specific state it wants to modify is > located. Doing this is not robust against optimizations that compact > the FPU buffer, as each access would require computing where in the > buffer it is. > > The easiest way to modify supervisor xfeature data is to force restore > the registers and write directly to the MSRs. Often times this is just fine > anyway as the registers need to be restored before returning to userspace. > Do this for now, leaving buffer writing optimizations for the future.
Just for my own clarity, does this mean lock/load _needs_ to happen before MSR access, or is it just a convenient place to do it? From later patches it seems it's a requirement during MSR access, which might be a good idea to detail here. It answers the question "when is this function needed?"
> > Add a new function fpregs_lock_and_load() that can simultaneously call > fpregs_lock() and do this restore. Also perform some extra sanity > checks in this function since this will be used in non-fpu focused code.
Nit: this is called "fpu_lock_and_load" in the patch itself.
> > Suggested-by: Thomas Gleixner <tglx@linutronix.de> > Signed-off-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
-- Kees Cook
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