Messages in this thread | | | Subject | Re: [PATCH v4 09/10] clk: qcom: dispcc: Update DP clk ops for phy design | From | Stephen Boyd <> | Date | Tue, 22 Sep 2020 11:51:43 -0700 |
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Quoting Stephen Boyd (2020-09-16 16:12:01) > The clk_rcg2_dp_determine_rate() function is used for the DP pixel clk. > This function should return the rate that can be achieved by the pixel > clk in 'struct clk_rate_request::rate' and match the logic similar to > what is seen in clk_rcg2_dp_set_rate(). But that isn't the case. Instead > the code merely bubbles the rate request up to the parent of the pixel > clk and doesn't try to do a rational approximation of the rate that > would be achieved by picking some m/n value for the RCG. > > Let's change this logic so that we can assume the parent clk frequency > is fixed (it is because it's the VCO of the DP PLL that is configured > based on the link rate) and so that we can calculate what the m/n value > will be and adjust the req->rate appropriately. > > Cc: Jeykumar Sankaran <jsanka@codeaurora.org> > Cc: Chandan Uddaraju <chandanu@codeaurora.org> > Cc: Vara Reddy <varar@codeaurora.org> > Cc: Tanmay Shah <tanmay@codeaurora.org> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Cc: Manu Gautam <mgautam@codeaurora.org> > Cc: Sandeep Maheswaram <sanm@codeaurora.org> > Cc: Douglas Anderson <dianders@chromium.org> > Cc: Sean Paul <seanpaul@chromium.org> > Cc: Stephen Boyd <sboyd@kernel.org> > Cc: Jonathan Marek <jonathan@marek.ca> > Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > Cc: Rob Clark <robdclark@chromium.org> > Signed-off-by: Stephen Boyd <swboyd@chromium.org> > ---
Applied to clk-next
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