[lkml]   [2020]   [Sep]   [22]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [PATCH v4 09/10] clk: qcom: dispcc: Update DP clk ops for phy design
Quoting Stephen Boyd (2020-09-16 16:12:01)
> The clk_rcg2_dp_determine_rate() function is used for the DP pixel clk.
> This function should return the rate that can be achieved by the pixel
> clk in 'struct clk_rate_request::rate' and match the logic similar to
> what is seen in clk_rcg2_dp_set_rate(). But that isn't the case. Instead
> the code merely bubbles the rate request up to the parent of the pixel
> clk and doesn't try to do a rational approximation of the rate that
> would be achieved by picking some m/n value for the RCG.
> Let's change this logic so that we can assume the parent clk frequency
> is fixed (it is because it's the VCO of the DP PLL that is configured
> based on the link rate) and so that we can calculate what the m/n value
> will be and adjust the req->rate appropriately.
> Cc: Jeykumar Sankaran <>
> Cc: Chandan Uddaraju <>
> Cc: Vara Reddy <>
> Cc: Tanmay Shah <>
> Cc: Bjorn Andersson <>
> Cc: Manu Gautam <>
> Cc: Sandeep Maheswaram <>
> Cc: Douglas Anderson <>
> Cc: Sean Paul <>
> Cc: Stephen Boyd <>
> Cc: Jonathan Marek <>
> Cc: Dmitry Baryshkov <>
> Cc: Rob Clark <>
> Signed-off-by: Stephen Boyd <>
> ---

Applied to clk-next

 \ /
  Last update: 2020-09-22 20:53    [W:0.055 / U:19.848 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site