lkml.org 
[lkml]   [2020]   [May]   [28]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH v3 4/6] bus: Add Baikal-T1 AXI-bus driver
On Thu, May 28, 2020 at 02:14:58PM +0200, Arnd Bergmann wrote:
> On Thu, May 28, 2020 at 12:01 AM Andy Shevchenko
> <andy.shevchenko@gmail.com> wrote:
> > On Tuesday, May 26, 2020, Serge Semin <Sergey.Semin@baikalelectronics.ru> wrote:
> >>
> >> AXI3-bus is the main communication bus connecting all high-speed
> >> peripheral IP-cores with RAM controller and MIPS P5600 cores on Baikal-T1
> >> SoC. Bus traffic arbitration is done by means of DW AMBA 3 AXI
> >> Interconnect (so called AXI Main Interconnect) routing IO requests from
> >> one SoC block to another. This driver provides a way to detect any bus
> >> protocol errors and device not responding situations by means of an
> >> embedded on top of the interconnect errors handler block (EHB). AXI
> >> Interconnect QoS arbitration tuning is currently unsupported.
> >> The bus doesn't provide a way to detect the interconnected devices,
> >> so they are supposed to be statically defined like by means of the
> >> simple-bus sub-nodes.
> >
> >
> >
> > Few comments in case if you need a new version. Main point is about sysfs_streq().
>
> I've applied the patch now and folded in fixes for the build warnings and
> errors pointed out by the test robot, but I did not include the changes you
> suggested.

Are you saying that the build-errors and warnings have already been fixed by
you, right? If so could you please give me a link to the repo with those
commits, so I'd work with the up-to-date code?

>
> Serge, could you send a follow-up patch to address those?

Ok.

-Sergey

>
> Arnd

\
 
 \ /
  Last update: 2020-05-28 14:29    [W:0.103 / U:0.300 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site