[lkml]   [2020]   [May]   [28]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [PATCH v3 4/6] bus: Add Baikal-T1 AXI-bus driver
On Thu, May 28, 2020 at 12:01 AM Andy Shevchenko
<> wrote:
> On Tuesday, May 26, 2020, Serge Semin <> wrote:
>> AXI3-bus is the main communication bus connecting all high-speed
>> peripheral IP-cores with RAM controller and MIPS P5600 cores on Baikal-T1
>> SoC. Bus traffic arbitration is done by means of DW AMBA 3 AXI
>> Interconnect (so called AXI Main Interconnect) routing IO requests from
>> one SoC block to another. This driver provides a way to detect any bus
>> protocol errors and device not responding situations by means of an
>> embedded on top of the interconnect errors handler block (EHB). AXI
>> Interconnect QoS arbitration tuning is currently unsupported.
>> The bus doesn't provide a way to detect the interconnected devices,
>> so they are supposed to be statically defined like by means of the
>> simple-bus sub-nodes.
> Few comments in case if you need a new version. Main point is about sysfs_streq().

I've applied the patch now and folded in fixes for the build warnings and
errors pointed out by the test robot, but I did not include the changes you

Serge, could you send a follow-up patch to address those?


 \ /
  Last update: 2020-05-28 14:15    [W:0.279 / U:1.948 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site