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SubjectRE: [v2 1/3] serial: 8250_dw: Add support for big-endian MMIO accesses
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From: Greg KH [mailto:greg@kroah.com] 
Sent: Tuesday, August 04, 2015 2:43 AM

> > - writel(value, p->membase + (offset << p->regshift));

> Why drop this write?
This was not dropped, it is now part of dw8250_serial_out32().
Now it is called before updating last_mcr.

> > - writel(value, p->membase + (UART_LCR << p->regshift));
> > + if (p->iotype == UPIO_MEM32BE)
> > + iowrite32be(value,
> > + p->membase + (UART_LCR << p->regshift));
> > + else
> > + writel(value,
> > + p->membase + (UART_LCR << p->regshift));

> Shouldn't this be hidden behind some other type of accessor? Why is this one writel() "special"?

I will add inner level accessors into "struct dw8250_data" for in32/out32. new accessors will be used in few places in this driver that still uses writel/readl without considering iotype.

Noam

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