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SubjectRe: [PATCH 06/12] perf/x86-ibs: Precise event sampling with IBS for AMD CPUs
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On Mon, 2012-04-02 at 20:19 +0200, Robert Richter wrote:
> + * We map IBS sampling to following precise levels:
> + *
> + * 1: RIP taken from IBS sample or (if invalid) from stack
> + * 2: RIP always taken from IBS sample, samples with an invalid rip
> + * are dropped. Thus samples of an event containing two precise
> + * modifiers (e.g. r076:pp) only contain (precise) addresses
> + * detected with IBS.

/*
* precise_ip:
*
* 0 - SAMPLE_IP can have arbitrary skid
* 1 - SAMPLE_IP must have constant skid
* 2 - SAMPLE_IP requested to have 0 skid
* 3 - SAMPLE_IP must have 0 skid
*
* See also PERF_RECORD_MISC_EXACT_IP
*/

your 1 doesn't have constant skid. I would suggest only supporting 2 and
letting userspace drop !PERF_RECORD_MISC_EXACT_IP records if so desired.

That said, mixing the IBS pmu into the regular core pmu isn't exactly
pretty..


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