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    Subject[PATCH 11/12] perf/x86-ibs: Catch spurious interrupts after stopping ibs
    Date
    After disabling IBS there could be still incomming NMIs with samples
    that even have the valid bit cleared. Mark all this NMIs as handled to
    avoid spurious interrupt messages.

    Signed-off-by: Robert Richter <robert.richter@amd.com>
    ---
    arch/x86/kernel/cpu/perf_event_amd_ibs.c | 12 +++++++-----
    1 files changed, 7 insertions(+), 5 deletions(-)

    diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
    index 35a35be..b44aa63 100644
    --- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c
    +++ b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
    @@ -475,11 +475,13 @@ static int perf_ibs_handle_irq(struct perf_ibs *perf_ibs, struct pt_regs *iregs)
    u64 *buf, *config, period;

    if (!test_bit(IBS_STARTED, pcpu->state)) {
    - /* Catch spurious interrupts after stopping IBS: */
    - if (!test_and_clear_bit(IBS_STOPPING, pcpu->state))
    - return 0;
    - rdmsrl(perf_ibs->msr, *ibs_data.regs);
    - return (*ibs_data.regs & perf_ibs->valid_mask) ? 1 : 0;
    + /*
    + * Catch spurious interrupts after stopping IBS: After
    + * disabling IBS there could be still incomming NMIs
    + * with samples that even have the valid bit cleared.
    + * Mark all this NMIs as handled.
    + */
    + return test_and_clear_bit(IBS_STOPPING, pcpu->state) ? 1 : 0;
    }

    msr = hwc->config_base;
    --
    1.7.8.4



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