| Date | Mon, 29 Oct 2012 16:24:41 +0100 | Subject | Re: [Patch v1 04/10] perf/x86: add memory profiling via PEBS Load Latency | From | Stephane Eranian <> |
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On Mon, Oct 29, 2012 at 4:23 PM, Peter Zijlstra <peterz@infradead.org> wrote: > On Mon, 2012-10-29 at 16:15 +0100, Stephane Eranian wrote: >> +EVENT_ATTR_STR(mem-loads, mem_ld_nhm, "event=0x100b,umask=0x1,ldlat=3"); >> +EVENT_ATTR_STR(mem-loads, mem_ld_snb, "event=0xcd,umask=0x1,ldlat=3"); > > I haven't fully grokked the macro magic yet, but event=0x100b seems > wrong, event only takes 8 bit on Intel.
Yeah, my bad. I messed up on this one. should be: event=0x0b,umask=0x10,ldlat=3
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