Messages in this thread | | | Subject | Re: [PATCH 5/5] perf, x86: Add support for AMD family 15h core counters | From | Peter Zijlstra <> | Date | Wed, 02 Feb 2011 18:03:18 +0100 |
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On Wed, 2011-02-02 at 17:41 +0100, Robert Richter wrote: > + unsigned int eventsel; > + unsigned int perfctr; > + unsigned int *eventsel_map; > + unsigned int *perfctr_map; > u64 (*event_map)(int); > int max_events; > int num_counters; > @@ -323,11 +325,17 @@ again: > > static inline unsigned int x86_pmu_config_addr(int index) > { > + if (x86_pmu.eventsel_map) > + return x86_pmu.eventsel_map[index]; > + > return x86_pmu.eventsel + index; > } > > static inline unsigned int x86_pmu_event_addr(int index) > { > + if (x86_pmu.perfctr_map) > + return x86_pmu.perfctr_map[index]; > + > return x86_pmu.perfctr + index; > }
Why this and not something like x86_pmu.perfctr + (index << 1)? You could even use alternatives.
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