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    Subject[79/90] drm/i915: save/restore BLC histogram control reg across suspend/resume
    2.6.31-stable review patch.  If anyone has any objections, please let us know.

    ------------------

    From: Jesse Barnes <jbarnes@virtuousgeek.org>

    commit 0eb96d6ed38430b72897adde58f5477a6b71757a upstream.

    Turns out some machines, like the ThinkPad X40 don't come back if you
    don't save/restore this register.

    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
    Signed-off-by: Eric Anholt <eric@anholt.net>
    Cc: Stefan Bader <stefan.bader@canonical.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

    ---
    drivers/gpu/drm/i915/i915_drv.h | 1 +
    drivers/gpu/drm/i915/i915_reg.h | 2 ++
    drivers/gpu/drm/i915/i915_suspend.c | 2 ++
    3 files changed, 5 insertions(+)

    --- a/drivers/gpu/drm/i915/i915_drv.h
    +++ b/drivers/gpu/drm/i915/i915_drv.h
    @@ -264,6 +264,7 @@ typedef struct drm_i915_private {
    u32 saveDSPASURF;
    u32 saveDSPATILEOFF;
    u32 savePFIT_PGM_RATIOS;
    + u32 saveBLC_HIST_CTL;
    u32 saveBLC_PWM_CTL;
    u32 saveBLC_PWM_CTL2;
    u32 saveFPB0;
    --- a/drivers/gpu/drm/i915/i915_reg.h
    +++ b/drivers/gpu/drm/i915/i915_reg.h
    @@ -915,6 +915,8 @@
    #define BACKLIGHT_DUTY_CYCLE_SHIFT (0)
    #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff)

    +#define BLC_HIST_CTL 0x61260
    +
    /* TV port control */
    #define TV_CTL 0x68000
    /** Enables the TV encoder */
    --- a/drivers/gpu/drm/i915/i915_suspend.c
    +++ b/drivers/gpu/drm/i915/i915_suspend.c
    @@ -416,6 +416,7 @@ int i915_save_state(struct drm_device *d
    dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL);
    dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS);
    dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL);
    + dev_priv->saveBLC_HIST_CTL = I915_READ(BLC_HIST_CTL);
    if (IS_I965G(dev))
    dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
    if (IS_MOBILE(dev) && !IS_I830(dev))
    @@ -560,6 +561,7 @@ int i915_restore_state(struct drm_device

    I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
    I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
    + I915_WRITE(BLC_HIST_CTL, dev_priv->saveBLC_HIST_CTL);
    I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
    I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
    I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);



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