Messages in this thread Patch in this message | | | From | Richard Weinberger <> | Subject | [PATCH] arm: dts: socfpga: denali needs nand_x_clk too | Date | Tue, 19 Jun 2018 14:07:19 +0200 |
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The denali NAND flash controller needs at least two clocks to operate, nand_clk and nand_x_clk. Since 1bb88666775e ("mtd: nand: denali: handle timing parameters by setup_data_interface()") nand_x_clk is used to derive timing settings.
Signed-off-by: Richard Weinberger <richard@nod.at> --- Strictly speaking denali needs a ecc_clk too, but AFAIK such a clock is not present on this SoC. But my SoCFPGA knowledge is very limited.
Thanks, //richard --- arch/arm/boot/dts/socfpga.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 486d4e7433ed..562f7b375bbd 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -754,7 +754,8 @@ reg-names = "nand_data", "denali_reg"; interrupts = <0x0 0x90 0x4>; dma-mask = <0xffffffff>; - clocks = <&nand_clk>; + clocks = <&nand_clk>, <&nand_x_clk>; + clock-names = "nand", "nand_x"; status = "disabled"; }; -- 2.17.1
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