Messages in this thread Patch in this message | | | From | Yijing Wang <> | Subject | [PATCH 2/6] title/pci: use cached pci_dev->pcie_mpss to simplify code | Date | Mon, 9 Sep 2013 21:13:04 +0800 |
| |
The PCI core caches the "PCI-E Max Payload Size Supported" in pci_dev->pcie_mpss, so use that instead of pcie_capability_read_dword().
Signed-off-by: Yijing Wang <wangyijing@huawei.com> --- arch/tile/kernel/pci.c | 7 ++----- 1 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c index 67237d3..692a799 100644 --- a/arch/tile/kernel/pci.c +++ b/arch/tile/kernel/pci.c @@ -246,15 +246,12 @@ static void fixup_read_and_payload_sizes(void) /* Scan for the smallest maximum payload size. */ for_each_pci_dev(dev) { u32 devcap; - int max_payload; if (!pci_is_pcie(dev)) continue; - pcie_capability_read_dword(dev, PCI_EXP_DEVCAP, &devcap); - max_payload = devcap & PCI_EXP_DEVCAP_PAYLOAD; - if (max_payload < smallest_max_payload) - smallest_max_payload = max_payload; + if (dev->pcie_mpss < smallest_max_payload) + smallest_max_payload = dev->pcie_mpss; } /* Now, set the max_payload_size for all devices to that value. */ -- 1.7.1
| |