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    SubjectRe: IO-APIC on nforce2 [PATCH] + [PATCH] for nmi_debug=1 + [PATCH] for idle=C1halt, 2.6.5
    Date
    On Tuesday 04 of May 2004 00:09, Allen Martin wrote:
    > I'm happy to be able to make this information public to the Linux
    > community. This information has been previously released to BIOS /
    > board vendors as an appnote, but in the interest of getting a workaround
    > into the hands of users the quickest we're making it public for possible
    > inclusion into the Linux kernel.

    This is a great news! Below is an untested patch to address this issue.

    Cheers.


    [PATCH] fixup for C1 Halt Disconnect problem on nForce2 chipsets

    Based on information provided by "Allen Martin" <AMartin@nvidia.com>.

    linux-2.6.6-rc3-bk2-bzolnier/arch/i386/pci/fixup.c | 39 +++++++++++++++++++++
    1 files changed, 39 insertions(+)

    diff -puN arch/i386/pci/fixup.c~nforce2_fix arch/i386/pci/fixup.c
    --- linux-2.6.6-rc3-bk2/arch/i386/pci/fixup.c~nforce2_fix 2004-05-04 00:27:18.114421672 +0200
    +++ linux-2.6.6-rc3-bk2-bzolnier/arch/i386/pci/fixup.c 2004-05-04 01:02:29.821393416 +0200
    @@ -187,6 +187,39 @@ static void __devinit pci_fixup_transpar
    dev->transparent = 1;
    }

    +/*
    + * Fixup for C1 Halt Disconnect problem on nForce2 systems.
    + *
    + * From information provided by "Allen Martin" <AMartin@nvidia.com>:
    + *
    + * A hang is caused when the CPU generates a very fast CONNECT/HALT cycle
    + * sequence. Workaround is to set the SYSTEM_IDLE_TIMEOUT to 80 ns.
    + * This allows the state-machine and timer to return to a proper state within
    + * 80 ns of the CONNECT and probe appearing together. Since the CPU will not
    + * issue another HALT within 80 ns of the initial HALT, the failure condition
    + * is avoided.
    + */
    +static void __devinit pci_fixup_nforce2(struct pci_dev *dev)
    +{
    + u32 val, fixed_val;
    + u8 rev;
    +
    + pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
    +
    + /*
    + * Chip Old value New value
    + * C17 0x1F01FF01 0x1F0FFF01
    + * C18D 0x9F01FF01 0x9F0FFF01
    + */
    + fixed_val = rev < 0xC1 ? 0x1F01FF01 : 0x9F01FF01;
    +
    + pci_read_config_dword(dev, 0x6c, &val);
    + if (val != fixed_val) {
    + printk(KERN_WARNING "PCI: nForce2 C1 Halt Disconnet fixup\n");
    + pci_write_config_dword(dev, 0x6c, fixed_val);
    + }
    +}
    +
    struct pci_fixup pcibios_fixups[] = {
    {
    .pass = PCI_FIXUP_HEADER,
    @@ -290,5 +323,11 @@ struct pci_fixup pcibios_fixups[] = {
    .device = PCI_ANY_ID,
    .hook = pci_fixup_transparent_bridge
    },
    + {
    + .pass = PCI_FIXUP_HEADER,
    + .vendor = PCI_VENDOR_ID_NVIDIA,
    + .device = PCI_DEVICE_ID_NVIDIA_NFORCE2,
    + .hook = pci_fixup_nforce2
    + },
    { .pass = 0 }
    };
    _

    -
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