Messages in this thread | | | Date | Mon, 11 Nov 2002 22:53:33 -0800 (PST) | Subject | Re: [PATCH] flush_cache_page while pte valid | From | "David S. Miller" <> |
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From: Hugh Dickins <hugh@veritas.com> Date: Tue, 12 Nov 2002 06:53:04 +0000 (GMT) Thanks for shedding light on that; but I'm still wondering if there might be data loss if userspace modifies the page in the tiny window between correctly positioned flush_cache_page and pte invalidation?
The flush merely writes back the data, a copy-back operation, fully L2 cache coherent. All cpus will see correct data if an intermittant store occurs. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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