Messages in this thread | | | Date | Mon, 11 Nov 2002 15:19:29 -0800 (PST) | Subject | Re: [PATCH] flush_cache_page while pte valid | From | "David S. Miller" <> |
| |
From: Hugh Dickins <hugh@veritas.com> Date: Mon, 11 Nov 2002 18:25:25 +0000 (GMT)
On some architectures (cachetlb.txt gives HyperSparc as an example) it is essential to flush_cache_page while pte is still valid: the rmap VM diverged from the base 2.4 VM before that fix was made, so this error has crept back into 2.5. ... (I wonder, what happens if userspace now modifies the page after the flush_cache_page, before the pte is invalidated?)
Thanks for catching this.
On architectures that are affected (such as the mentioned HyperSPARC chips), the cpu will take a trap and OOPS the kernel if the PTE is invalidated before the cache flush is made. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
| |