lkml.org 
[lkml]   [2002]   [Nov]   [12]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
SubjectRe: [PATCH] flush_cache_page while pte valid
From
   From: Rik van Riel <riel@conectiva.com.br>
Date: Tue, 12 Nov 2002 12:49:50 -0200 (BRST)

On Mon, 11 Nov 2002, David S. Miller wrote:
> The flush merely writes back the data, a copy-back operation, fully L2
> cache coherent. All cpus will see correct data if an intermittant
> store occurs.

The CPUs will, but the harddisk might not.

We really need to get this right in the swapout path.

We do get it right, watch:

1) remove last mapping instance of page

-> MM level cache flush pushes it permanently to ram
in full view of DMA activity

2) remove last mapping, but new one appears as we swap out

-> no problem we'll see one of several instances of the
page and we'll need to reswap it out later anyways
if someone currently writes to it

I know this because I tested this extensively ages ago on sparc32
where it really mattered.
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/

\
 
 \ /
  Last update: 2005-03-22 13:30    [W:0.051 / U:0.152 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site