Messages in this thread Patch in this message | | | From | Seongsu Park <> | Subject | [PATCH v2] arm64: Fix double TCR_T0SZ_OFFSET shift | Date | Wed, 3 Apr 2024 11:42:36 +0900 |
| |
We have already shifted the value of t0sz in TCR_T0SZ by TCR_T0SZ_OFFSET. So, the TCR_T0SZ_OFFSET shift here should be removed.
Co-developed-by: Leem ChaeHoon <infinite.run@gmail.com> Signed-off-by: Leem ChaeHoon <infinite.run@gmail.com> Co-developed-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> Signed-off-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> Co-developed-by: Soomin Cho <to.soomin@gmail.com> Signed-off-by: Soomin Cho <to.soomin@gmail.com> Co-developed-by: DaeRo Lee <skseofh@gmail.com> Signed-off-by: DaeRo Lee <skseofh@gmail.com> Co-developed-by: kmasta <kmasta.study@gmail.com> Signed-off-by: kmasta <kmasta.study@gmail.com> Signed-off-by: Seongsu Park <sgsu.park@samsung.com> ---
Changes in v2: - Condition is updated
--- arch/arm64/include/asm/mmu_context.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index c768d16b81a4..bd19f4c758b7 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -72,11 +72,11 @@ static inline void __cpu_set_tcr_t0sz(unsigned long t0sz) { unsigned long tcr = read_sysreg(tcr_el1); - if ((tcr & TCR_T0SZ_MASK) >> TCR_T0SZ_OFFSET == t0sz) + if ((tcr & TCR_T0SZ_MASK) == t0sz) return; tcr &= ~TCR_T0SZ_MASK; - tcr |= t0sz << TCR_T0SZ_OFFSET; + tcr |= t0sz; write_sysreg(tcr, tcr_el1); isb(); } -- 2.34.1
| |