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Subject[PATCH v2 0/2] Add JH8100 external interrupt controller support
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This patchset adds external interrupt controller driver for the StarFive
JH81000 SoC. It can be used to handle high-level input interrupt signals.
It also send the output interrupt signal to RISC-V PLIC.

changes since v1:
- Rebased on tag v6.8-rc1.
- Dropped store reset_contorl.
- Replaced "of_reset_control_get_by_index" with of_reset_control_get_exclusive
- Printed the error code via %pe

v1: https://lore.kernel.org/all/20240111023201.6187-1-changhuang.liang@starfivetech.com/

Changhuang Liang (2):
dt-bindings: interrupt-controller: Add starfive,jh8100-intc
irqchip: Add StarFive external interrupt controller

.../starfive,jh8100-intc.yaml | 61 ++++++
MAINTAINERS | 6 +
drivers/irqchip/Kconfig | 11 ++
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-starfive-jh8100-intc.c | 180 ++++++++++++++++++
5 files changed, 259 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/starfive,jh8100-intc.yaml
create mode 100644 drivers/irqchip/irq-starfive-jh8100-intc.c

--
2.25.1

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