Messages in this thread | | | Date | Thu, 31 Aug 2023 11:34:52 -0700 | From | Dan Williams <> | Subject | RE: [PATCH v10 04/15] cxl/hdm: Use stored Component Register mappings to map HDM decoder capability |
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Terry Bowman wrote: > From: Robert Richter <rrichter@amd.com> > > Now, that the Component Register mappings are stored, use them to > enable and map the HDM decoder capabilities. The Component Registers > do not need to be probed again for this, remove probing code. > > The HDM capability applies to Endpoints, USPs and VH Host Bridges. The > Endpoint's component register mappings are located in the cxlds and > else in the port's structure. Provide a helper function > cxl_port_get_comp_map() to locate the mappings depending on the > component's type. > > Signed-off-by: Robert Richter <rrichter@amd.com> > Signed-off-by: Terry Bowman <terry.bowman@amd.com> > Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > Reviewed-by: Dave Jiang <dave.jiang@intel.com> > --- > drivers/cxl/core/hdm.c | 65 +++++++++++++++++++++++------------------- > 1 file changed, 35 insertions(+), 30 deletions(-) > > diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c > index 17c8ba8c75e0..892a1fb5e4c6 100644 > --- a/drivers/cxl/core/hdm.c > +++ b/drivers/cxl/core/hdm.c > @@ -81,27 +81,6 @@ static void parse_hdm_decoder_caps(struct cxl_hdm *cxlhdm) > cxlhdm->interleave_mask |= GENMASK(14, 12); > } > > -static int map_hdm_decoder_regs(struct cxl_port *port, void __iomem *crb, > - struct cxl_component_regs *regs) > -{ > - struct cxl_register_map map = { > - .dev = &port->dev, > - .resource = port->component_reg_phys, > - .base = crb, > - .max_size = CXL_COMPONENT_REG_BLOCK_SIZE, > - }; > - > - cxl_probe_component_regs(&port->dev, crb, &map.component_map); > - if (!map.component_map.hdm_decoder.valid) { > - dev_dbg(&port->dev, "HDM decoder registers not implemented\n"); > - /* unique error code to indicate no HDM decoder capability */ > - return -ENODEV; > - } > - > - return cxl_map_component_regs(&map, &port->dev, regs, > - BIT(CXL_CM_CAP_CAP_ID_HDM)); > -} > - > static bool should_emulate_decoders(struct cxl_endpoint_dvsec_info *info) > { > struct cxl_hdm *cxlhdm; > @@ -146,6 +125,22 @@ static bool should_emulate_decoders(struct cxl_endpoint_dvsec_info *info) > return true; > } > > +static struct cxl_register_map *cxl_port_get_comp_map(struct cxl_port *port) > +{ > + /* > + * HDM capability applies to Endpoints, USPs and VH Host > + * Bridges. The Endpoint's component register mappings are > + * located in the cxlds. > + */ > + if (is_cxl_endpoint(port)) { > + struct cxl_memdev *memdev = to_cxl_memdev(port->uport_dev); > + > + return &memdev->cxlds->comp_map; > + } > + > + return &port->comp_map; > +}
This was the function I was hoping would disappear in the new version. cxl_pci and cxl_port care about different register blocks and have different mapping lifetimes. I think that justifies having the endpoint->comp_map be valid for everything that the cxl_port driver cares about even though it duplicates some informatiom from cxlds->comp_map.
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