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    Subject[PATCH v10 06/15] cxl/port: Remove Component Register base address from struct cxl_port
    Date
    From: Robert Richter <rrichter@amd.com>

    The Component Register base address @component_reg_phys is no longer
    used after the rework of the Component Register setup which now uses
    struct member @comp_map instead. Remove the base address.

    Signed-off-by: Robert Richter <rrichter@amd.com>
    Signed-off-by: Terry Bowman <terry.bowman@amd.com>
    Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
    Reviewed-by: Dave Jiang <dave.jiang@intel.com>
    ---
    drivers/cxl/core/port.c | 4 +---
    drivers/cxl/cxl.h | 2 --
    2 files changed, 1 insertion(+), 5 deletions(-)

    diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
    index 6c06c36f8c7b..9151ec5b879b 100644
    --- a/drivers/cxl/core/port.c
    +++ b/drivers/cxl/core/port.c
    @@ -618,7 +618,6 @@ static int devm_cxl_link_parent_dport(struct device *host,
    static struct lock_class_key cxl_port_key;

    static struct cxl_port *cxl_port_alloc(struct device *uport_dev,
    - resource_size_t component_reg_phys,
    struct cxl_dport *parent_dport)
    {
    struct cxl_port *port;
    @@ -669,7 +668,6 @@ static struct cxl_port *cxl_port_alloc(struct device *uport_dev,
    } else
    dev->parent = uport_dev;

    - port->component_reg_phys = component_reg_phys;
    ida_init(&port->decoder_ida);
    port->hdm_end = -1;
    port->commit_end = -1;
    @@ -731,7 +729,7 @@ static struct cxl_port *__devm_cxl_add_port(struct device *host,
    struct device *dev;
    int rc;

    - port = cxl_port_alloc(uport_dev, component_reg_phys, parent_dport);
    + port = cxl_port_alloc(uport_dev, parent_dport);
    if (IS_ERR(port))
    return port;

    diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
    index ec8ba9ebcf64..b4383697180f 100644
    --- a/drivers/cxl/cxl.h
    +++ b/drivers/cxl/cxl.h
    @@ -578,7 +578,6 @@ struct cxl_dax_region {
    * @nr_dports: number of entries in @dports
    * @hdm_end: track last allocated HDM decoder instance for allocation ordering
    * @commit_end: cursor to track highest committed decoder for commit ordering
    - * @component_reg_phys: component register capability base address (optional)
    * @dead: last ep has been removed, force port re-creation
    * @depth: How deep this port is relative to the root. depth 0 is the root.
    * @cdat: Cached CDAT data
    @@ -598,7 +597,6 @@ struct cxl_port {
    int nr_dports;
    int hdm_end;
    int commit_end;
    - resource_size_t component_reg_phys;
    bool dead;
    unsigned int depth;
    struct cxl_cdat {
    --
    2.34.1
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