Messages in this thread Patch in this message | ![/](/images/icornerl.gif) | | From | Sean Anderson <> | Subject | [PATCH] phy: zynqmp: Allow variation in refclk rate | Date | Tue, 11 Jul 2023 15:45:39 -0400 |
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Due to limited available frequency ratios, the reference clock rate may not be exactly the same as the required rate. Allow a small (100 ppm) deviation.
Signed-off-by: Sean Anderson <sean.anderson@seco.com> ---
drivers/phy/xilinx/phy-zynqmp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/xilinx/phy-zynqmp.c b/drivers/phy/xilinx/phy-zynqmp.c index b0c2045b886e..2559c6594cea 100644 --- a/drivers/phy/xilinx/phy-zynqmp.c +++ b/drivers/phy/xilinx/phy-zynqmp.c @@ -904,7 +904,10 @@ static int xpsgtr_get_ref_clocks(struct xpsgtr_dev *gtr_dev) rate = clk_get_rate(clk); for (i = 0 ; i < ARRAY_SIZE(ssc_lookup); i++) { - if (rate == ssc_lookup[i].refclk_rate) { + /* Allow an error of 100 ppm */ + unsigned long error = ssc_lookup[i].refclk_rate / 10000; + + if (abs(rate - ssc_lookup[i].refclk_rate) < error) { gtr_dev->refclk_sscs[refclk] = &ssc_lookup[i]; break; } -- 2.35.1.1320.gc452695387.dirty
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