Messages in this thread Patch in this message | | | From | Samuel Holland <> | Subject | [PATCH] gpio: sifive: Support IRQ wake | Date | Mon, 26 Jun 2023 10:26:08 -0700 |
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Each pin drives a separate interrupt in the parent IRQ domain, so there is no need to set IRQCHIP_MASK_ON_SUSPEND.
Signed-off-by: Samuel Holland <samuel.holland@sifive.com> ---
drivers/gpio/gpio-sifive.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c index 98939cd4a71e..c2653313f3a2 100644 --- a/drivers/gpio/gpio-sifive.c +++ b/drivers/gpio/gpio-sifive.c @@ -150,6 +150,7 @@ static const struct irq_chip sifive_gpio_irqchip = { .irq_disable = sifive_gpio_irq_disable, .irq_eoi = sifive_gpio_irq_eoi, .irq_set_affinity = sifive_gpio_irq_set_affinity, + .irq_set_wake = irq_chip_set_wake_parent, .flags = IRQCHIP_IMMUTABLE, GPIOCHIP_IRQ_RESOURCE_HELPERS, }; -- 2.40.1
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