Messages in this thread Patch in this message | | | From | Samin Guo <> | Subject | [PATCH v5 10/12] riscv: dts: starfive: visionfive-2-v1.3b: Add gmac+phy's delay configuration | Date | Fri, 3 Mar 2023 16:59:26 +0800 |
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v1.3B uses motorcomm YT8531(rgmii-id phy) x2, need delay and inverse configurations.
The tx_clk of v1.3B uses an external clock and needs to be switched to an external clock source.
Signed-off-by: Samin Guo <samin.guo@starfivetech.com> --- .../jh7110-starfive-visionfive-2-v1.3b.dts | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts index 9230cc3d8946..32fae0de9a44 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.3b.dts @@ -11,3 +11,30 @@ model = "StarFive VisionFive 2 v1.3B"; compatible = "starfive,visionfive-2-v1.3b", "starfive,jh7110"; }; + +&gmac0 { + starfive,tx-use-rgmii-clk; + assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>; + assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>; +}; + +&gmac1 { + starfive,tx-use-rgmii-clk; + assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>; + assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>; +}; + +&phy0 { + motorcomm,tx-clk-adj-enabled; + motorcomm,tx-clk-100-inverted; + motorcomm,tx-clk-1000-inverted; + rx-internal-delay-ps = <1900>; + tx-internal-delay-ps = <1500>; +}; + +&phy1 { + motorcomm,tx-clk-adj-enabled; + motorcomm,tx-clk-100-inverted; + rx-internal-delay-ps = <0>; + tx-internal-delay-ps = <0>; +}; -- 2.17.1
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