Messages in this thread Patch in this message | ![/](/images/icornerl.gif) | | From | Richard van Schagen <> | Subject | [PATCH] Fix Flooding: Disable by default on User ports and Enable on CPU ports | Date | Sun, 12 Feb 2023 22:40:27 +0100 |
| |
--- drivers/net/dsa/mt7530.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index f98a94361c84..f456541a68bc 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -997,6 +997,7 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int port) { struct mt7530_priv *priv = ds->priv; int ret; + u32 val; /* Setup max capability of CPU port at first */ if (priv->info->cpu_port_config) { @@ -1009,9 +1010,10 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int port) mt7530_write(priv, MT7530_PVC_P(port), PORT_SPEC_TAG); - /* Disable flooding by default */ - mt7530_rmw(priv, MT7530_MFC, BC_FFP_MASK | UNM_FFP_MASK | UNU_FFP_MASK, - BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | UNU_FFP(BIT(port))); + /* Enable flooding on CPU */ + val = mt7530_read(priv, MT7530_MFC); + val |= BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | UNU_FFP(BIT(port)); + mt7530_write(priv, MT7530_MFC, val); /* Set CPU port number */ if (priv->id == ID_MT7621) @@ -2155,6 +2157,9 @@ mt7530_setup(struct dsa_switch *ds) priv->p6_interface = PHY_INTERFACE_MODE_NA; + /* Disable flooding by default */ + mt7530_rmw(priv, MT7530_MFC, BC_FFP_MASK | UNM_FFP_MASK | UNU_FFP_MASK, 0); + /* Enable and reset MIB counters */ mt7530_mib_reset(ds); @@ -2346,6 +2351,9 @@ mt7531_setup(struct dsa_switch *ds) mt7530_rmw(priv, MT753X_BPC, MT753X_BPDU_PORT_FW_MASK, MT753X_BPDU_CPU_ONLY); + /* Disable flooding by default */ + mt7530_rmw(priv, MT7530_MFC, BC_FFP_MASK | UNM_FFP_MASK | UNU_FFP_MASK, 0); + /* Enable and reset MIB counters */ mt7530_mib_reset(ds); -- 2.30.2
| ![\](/images/icornerr.gif) |