Messages in this thread Patch in this message | | | From | Yian Chen <> | Subject | [PATCH 6/7] x86/cpu: Set LASS as pinning sensitive CR4 bit | Date | Mon, 9 Jan 2023 21:52:03 -0800 |
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Security protection features are pinning sensitive. LASS comes with an effort for security concerns. Therefore, add it to the set of pinning sensitive bits
Signed-off-by: Yian Chen <yian.chen@intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> --- arch/x86/kernel/cpu/common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index efc7c7623968..e224cbaf7866 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -432,7 +432,7 @@ static __always_inline void setup_lass(struct cpuinfo_x86 *c) /* These bits should not change their value after CPU init is finished. */ static const unsigned long cr4_pinned_mask = X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP | - X86_CR4_FSGSBASE | X86_CR4_CET; + X86_CR4_FSGSBASE | X86_CR4_CET | X86_CR4_LASS; static DEFINE_STATIC_KEY_FALSE_RO(cr_pinning); static unsigned long cr4_pinned_bits __ro_after_init; -- 2.34.1
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