Messages in this thread Patch in this message | | | From | Shazad Hussain <> | Subject | [PATCH v1] clk: qcom: gcc-sc8280xp: add cxo as parent for gcc_ufs_ref_clkref_clk | Date | Sun, 30 Oct 2022 19:53:33 +0530 |
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Since 'commit f3aa975e230e ("arm64: dts: qcom: sc8280xp: correct ref clock for ufs_mem_phy")' we need to explicitly make cxo as parent to gcc_ufs_ref_clkref_clk to have an independent vote from ufs_mem_phy.
Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com> --- drivers/clk/qcom/gcc-sc8280xp.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c index a18ed88f3b82..72b545121c57 100644 --- a/drivers/clk/qcom/gcc-sc8280xp.c +++ b/drivers/clk/qcom/gcc-sc8280xp.c @@ -5848,6 +5848,8 @@ static struct clk_branch gcc_ufs_ref_clkref_clk = { .enable_mask = BIT(0), .hw.init = &(const struct clk_init_data) { .name = "gcc_ufs_ref_clkref_clk", + .parent_data = &gcc_parent_data_tcxo, + .num_parents = 1, .ops = &clk_branch2_ops, }, }, -- 2.38.0
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