Messages in this thread Patch in this message | | | From | Song Yoong Siang <> | Subject | [PATCH net-next 1/1] net: phy: marvell10g: Add WAKE_PHY support to WOL event | Date | Fri, 13 Aug 2021 16:45:36 +0800 |
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Add Wake-on-PHY feature support by enabling the Link Status Changed interrupt.
Signed-off-by: Song Yoong Siang <yoong.siang.song@intel.com> --- drivers/net/phy/marvell10g.c | 33 ++++++++++++++++++++++++++++++++- 1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c index 0b7cae118ad7..d46761c225f0 100644 --- a/drivers/net/phy/marvell10g.c +++ b/drivers/net/phy/marvell10g.c @@ -76,6 +76,11 @@ enum { MV_PCS_CSSR1_SPD2_2500 = 0x0004, MV_PCS_CSSR1_SPD2_10000 = 0x0000, + /* Copper Specific Interrupt registers */ + MV_PCS_INTR_ENABLE = 0x8010, + MV_PCS_INTR_ENABLE_LSC = BIT(10), + MV_PCS_INTR_STS = 0x8011, + /* Temperature read register (88E2110 only) */ MV_PCS_TEMP = 0x8042, @@ -1036,7 +1041,7 @@ static void mv3110_get_wol(struct phy_device *phydev, { int ret; - wol->supported = WAKE_MAGIC; + wol->supported = WAKE_MAGIC | WAKE_PHY; wol->wolopts = 0; ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_WOL_CTRL); @@ -1045,6 +1050,13 @@ static void mv3110_get_wol(struct phy_device *phydev, if (ret & MV_V2_WOL_CTRL_MAGIC_PKT_EN) wol->wolopts |= WAKE_MAGIC; + + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_INTR_ENABLE); + if (ret < 0) + return; + + if (ret & MV_PCS_INTR_ENABLE_LSC) + wol->wolopts |= WAKE_PHY; } static int mv3110_set_wol(struct phy_device *phydev, @@ -1099,6 +1111,25 @@ static int mv3110_set_wol(struct phy_device *phydev, return ret; } + if (wol->wolopts & WAKE_PHY) { + /* Enable the link status changed interrupt */ + ret = phy_set_bits_mmd(phydev, MDIO_MMD_PCS, + MV_PCS_INTR_ENABLE, + MV_PCS_INTR_ENABLE_LSC); + if (ret < 0) + return ret; + + /* Clear the interrupt status register */ + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_INTR_STS); + } else { + /* Disable the link status changed interrupt */ + ret = phy_clear_bits_mmd(phydev, MDIO_MMD_PCS, + MV_PCS_INTR_ENABLE, + MV_PCS_INTR_ENABLE_LSC); + if (ret < 0) + return ret; + } + /* Reset the clear WOL status bit as it does not self-clear */ return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_WOL_CTRL, -- 2.25.1
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