Messages in this thread Patch in this message | | | From | Steven Lee <> | Subject | [PATCH v1 3/4] ARM: dts: aspeed-g5: Modify sgpio node for the enhanced sgpio driver. | Date | Wed, 26 May 2021 17:46:07 +0800 |
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The enhanced sgpio driver has changed the compatible name to sgpiom and reads the max number of sgpio pins that SoC supported from max-ngpios in dts.
Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> --- arch/arm/boot/dts/aspeed-g5.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index d733c1f161c1..730cbd48eedb 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -345,13 +345,14 @@ sgpio: sgpio@1e780200 { #gpio-cells = <2>; - compatible = "aspeed,ast2500-sgpio"; + compatible = "aspeed,ast2500-sgpiom"; gpio-controller; interrupts = <40>; reg = <0x1e780200 0x0100>; clocks = <&syscon ASPEED_CLK_APB>; interrupt-controller; ngpios = <8>; + max-ngpios = <80>; bus-frequency = <12000000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgpm_default>; -- 2.17.1
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