Messages in this thread Patch in this message | | | From | Jiuyang Liu <> | Subject | [PATCH] implement flush_cache_vmap and flush_cache_vunmap for RISC-V | Date | Mon, 29 Mar 2021 01:55:09 +0000 |
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This patch implements flush_cache_vmap and flush_cache_vunmap for RISC-V, since these functions might modify PTE. Without this patch, SFENCE.VMA won't be added to related codes, which might introduce a bug in some out-of-order micro-architecture implementations.
Signed-off-by: Jiuyang Liu <liu@jiuyang.me> --- arch/riscv/include/asm/cacheflush.h | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h index 23ff70350992..4adf25248c43 100644 --- a/arch/riscv/include/asm/cacheflush.h +++ b/arch/riscv/include/asm/cacheflush.h @@ -8,6 +8,14 @@ #include <linux/mm.h> +/* + * flush_cache_vmap and flush_cache_vunmap might modify PTE, needs SFENCE.VMA. + * - flush_cache_vmap is invoked after map_kernel_range() has installed the page table entries. + * - flush_cache_vunmap is invoked before unmap_kernel_range() deletes the page table entries + */ +#define flush_cache_vmap(start, end) flush_tlb_all() +#define flush_cache_vunmap(start, end) flush_tlb_all() + static inline void local_flush_icache_all(void) { asm volatile ("fence.i" ::: "memory"); -- 2.31.1
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