Messages in this thread | | | Subject | Re: [PATCH V2 16/25] perf/x86: Register hybrid PMUs | From | Dave Hansen <> | Date | Wed, 10 Mar 2021 08:50:06 -0800 |
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On 3/10/21 8:37 AM, kan.liang@linux.intel.com wrote: > - err = perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW); > - if (err) > - goto out2; > + if (!is_hybrid()) { > + err = perf_pmu_register(&pmu, "cpu", PERF_TYPE_RAW); > + if (err) > + goto out2; > + } else { > + u8 cpu_type = get_hybrid_cpu_type(smp_processor_id()); > + struct x86_hybrid_pmu *hybrid_pmu; > + int i;
Where's the preempt_disable()?
> +static void init_hybrid_pmu(int cpu) > +{ > + unsigned int fixed_mask, unused_eax, unused_ebx, unused_edx; > + struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu); > + u8 cpu_type = get_hybrid_cpu_type(cpu); > + struct x86_hybrid_pmu *pmu = NULL; > + struct perf_cpu_context *cpuctx; > + int i;
Ditto.
Are we really sure the IPIs are worth the trouble? Why don't we just cache the leaf when we bring the CPU up like just about every other thing we read from CPUID?
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