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    SubjectRe: [PATCH V2 20/25] perf/x86/intel: Add Alder Lake Hybrid support
    On Wed, Mar 10, 2021 at 08:37:56AM -0800, kan.liang@linux.intel.com wrote:
    > From: Kan Liang <kan.liang@linux.intel.com>
    >
    > Alder Lake Hybrid system has two different types of core, Golden Cove
    > core and Gracemont core. The Golden Cove core is registered to
    > "cpu_core" PMU. The Gracemont core is registered to "cpu_atom" PMU.
    >
    > The difference between the two PMUs include:
    > - Number of GP and fixed counters
    > - Events
    > - The "cpu_core" PMU supports Topdown metrics.
    > The "cpu_atom" PMU supports PEBS-via-PT.
    >
    > The "cpu_core" PMU is similar to the Sapphire Rapids PMU, but without
    > PMEM.
    > The "cpu_atom" PMU is similar to Tremont, but with different
    > event_constraints, extra_regs and number of counters.
    >

    > + /* Initialize big core specific PerfMon capabilities.*/
    > + pmu = &x86_pmu.hybrid_pmu[X86_HYBRID_PMU_CORE_IDX];
    > + pmu->name = "cpu_core";

    > + /* Initialize Atom core specific PerfMon capabilities.*/
    > + pmu = &x86_pmu.hybrid_pmu[X86_HYBRID_PMU_ATOM_IDX];
    > + pmu->name = "cpu_atom";

    So do these things use the same event lists as SPR and TNT? Is there any
    way to discover that, because AFAICT /proc/cpuinfo will say every CPU
    is 'Alderlake', and the above also doesn't give any clue.

    FWIW, ARM big.LITTLE does discriminate in its /proc/cpuinfo, but I'm not
    entirely sure it's really useful. Mark said perf userspace uses
    somethink akin to our CPUID, except exposed through sysfs, to find the
    event lists.

    My desktop has: cpu/caps/pmu_name and that gives "skylake", do we want
    the above to have cpu_core/caps/pmu_name give "sapphire_rapids" etc.. ?

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