Messages in this thread | | | Subject | Re: [PATCH] clk: sunxi-ng: v3s: add support for variable rate audio pll output | From | Tobias Schramm <> | Date | Thu, 18 Feb 2021 10:18:39 +0100 |
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Hi Icenowy,
> We have introducee SDM-based accurate audio PLL on several > other SoCs. Some people is quite sensitive about audio-related things. > While it is possible to support 24MHz * 128 / 25 / 5 = 24.576MHz without delta sigma modulation, matching 22.5792MHz is indeed not possible. I read you'd prefer me to use SDM like the other SoCs though? Shall I send a v2 utilizing SDM?
Cheers, Tobias
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