Messages in this thread | | | Subject | Re: [PATCH v6 09/16] soc: mediatek: mmsys: modify reset controller for MT8195 vdosys1 | From | AngeloGioacchino Del Regno <> | Date | Thu, 14 Oct 2021 16:56:05 +0200 |
| |
Il 04/10/21 08:21, Nancy.Lin ha scritto: > MT8195 vdosys1 has more than 32 reset bits and a different reset base > than other chips. Modify mmsys for support 64 bit and different reset > base. > > Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> > --- > drivers/soc/mediatek/mt8195-mmsys.h | 1 + > drivers/soc/mediatek/mtk-mmsys.c | 21 ++++++++++++++++----- > drivers/soc/mediatek/mtk-mmsys.h | 2 ++ > 3 files changed, 19 insertions(+), 5 deletions(-) > > diff --git a/drivers/soc/mediatek/mt8195-mmsys.h b/drivers/soc/mediatek/mt8195-mmsys.h > index 648baaec112b..f67801c42fd9 100644 > --- a/drivers/soc/mediatek/mt8195-mmsys.h > +++ b/drivers/soc/mediatek/mt8195-mmsys.h > @@ -123,6 +123,7 @@ > #define MT8195_VDO1_MIXER_SOUT_SEL_IN 0xf68 > #define MT8195_MIXER_SOUT_SEL_IN_FROM_DISP_MIXER (0 << 0) > > +#define MT8195_VDO1_SW0_RST_B 0x1d0
All other definitions are indented with tabulations, but these are spaces here. Please, do not mix formatting.
Regards, - Angelo
| |