Messages in this thread | | | Date | Fri, 15 Jan 2021 10:27:00 -0800 | From | Andi Kleen <> | Subject | Re: [PATCH v3 00/17] KVM: x86/pmu: Add support to enable Guest PEBS via DS |
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> I'm asking about ucode/hardare. Is the "guest pebs buffer write -> PEBS PMI" > guaranteed to be atomic?
Of course not. > > In practice, under what scenarios will guest counters get cross-mapped? And, > how does this support affect guest accuracy? I.e. how bad do things get for the > guest if we simply disable guest counters if they can't have a 1:1 association > with their physical counter?
This would completely break perfmon for the guest, likely with no way to recover.
-Andi
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