Messages in this thread | | | Subject | Re: [PATCH v4 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC | From | "Ramuthevar, Vadivel MuruganX" <> | Date | Wed, 29 Apr 2020 21:29:40 +0800 |
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Hi Boris,
Thank you very much for the review comments and your time..
On 29/4/2020 7:33 pm, Boris Brezillon wrote: > On Wed, 29 Apr 2020 18:42:05 +0800 > "Ramuthevar,Vadivel MuruganX" > <vadivel.muruganx.ramuthevar@linux.intel.com> wrote: > >> +#define NAND_WRITE_CMD (EBU_CON_CS_P_LOW | HSNAND_CLE_OFFS) >> +#define NAND_WRITE_ADDR (EBU_CON_CS_P_LOW | HSNAND_ALE_OFFS) >> + > > I thought we agreed on dropping those definitions.
Yes , we agreed upon it, due to assertion/de-assertion of CS kept it. Thanks!
Regards Vadivel >
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