lkml.org 
[lkml]   [2020]   [Feb]   [25]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH v2] ARM: dts: rainier: Set PCA9552 pin types
Date
All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type
GPIO.

Signed-off-by: Matthew Barth <msbarth@linux.ibm.com>
---
v2: Added leds-pca955x.h include
Added upstream to patch
---
---
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index c63cefce636d..d9fa9fd48058 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -4,6 +4,7 @@

#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/leds/leds-pca955x.h>

/ {
model = "Rainier";
@@ -351,66 +352,82 @@

gpio@0 {
reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@1 {
reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@2 {
reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@3 {
reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@4 {
reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@5 {
reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@6 {
reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@7 {
reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@8 {
reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@9 {
reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@10 {
reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@11 {
reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@12 {
reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@13 {
reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@14 {
reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
};

gpio@15 {
reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
};
};

--
2.24.1
\
 
 \ /
  Last update: 2020-02-25 21:15    [W:0.165 / U:0.084 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site