Messages in this thread | | | Date | Thu, 13 Feb 2020 10:16:51 +0100 | From | Peter Zijlstra <> | Subject | Re: [PATCH 7/7] microblaze: Do atomic operations by using exclusive ops |
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On Thu, Feb 13, 2020 at 09:58:49AM +0100, Peter Zijlstra wrote:
> The thing is, your bog standard LL/SC _SHOULD_ fail the SC if someone > else does a regular store to the same variable. See the example in > Documentation/atomic_t.txt. > > That is, a competing SW/SWI should result in the interconnect responding > with something other than EXOKAY, the SWX should fail and MSR[C] <- 1.
The thing is; we have code that relies on this behaviour. There are a few crusty SMP archs that sorta-kinda limp along (mostly by disabling some of the code and praying the rest doesn't trigger too often), but we really should not allow more broken SMP archs.
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