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SubjectRE: [PATCH] KVM: x86: emulate wait-for-SIPI and SIPI-VMExit
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> -----Original Message-----
> From: Paolo Bonzini <pbonzini@redhat.com>
> Sent: Tuesday, September 22, 2020 5:10 PM
> To: Qi, Yadong <yadong.qi@intel.com>; kvm@vger.kernel.org; linux-
> kernel@vger.kernel.org; x86@kernel.org
> Cc: Christopherson, Sean J <sean.j.christopherson@intel.com>;
> vkuznets@redhat.com; wanpengli@tencent.com; jmattson@google.com;
> joro@8bytes.org; tglx@linutronix.de; mingo@redhat.com; bp@alien8.de;
> hpa@zytor.com; liran.alon@oracle.com; nikita.leshchenko@oracle.com; Gao,
> Chao <chao.gao@intel.com>; Tian, Kevin <kevin.tian@intel.com>; Chen, Luhai
> <luhai.chen@intel.com>; Zhu, Bing <bing.zhu@intel.com>; Wang, Kai Z
> <kai.z.wang@intel.com>
> Subject: Re: [PATCH] KVM: x86: emulate wait-for-SIPI and SIPI-VMExit
>
> On 22/09/20 07:23, yadong.qi@intel.com wrote:
> > From: Yadong Qi <yadong.qi@intel.com>
> >
> > Background: We have a lightweight HV, it needs INIT-VMExit and
> > SIPI-VMExit to wake-up APs for guests since it do not monitor the
> > Local APIC. But currently virtual wait-for-SIPI(WFS) state is not
> > supported in nVMX, so when running on top of KVM, the L1 HV cannot
> > receive the INIT-VMExit and SIPI-VMExit which cause the L2 guest
> > cannot wake up the APs.
> >
> > According to Intel SDM Chapter 25.2 Other Causes of VM Exits, SIPIs
> > cause VM exits when a logical processor is in wait-for-SIPI state.
> >
> > In this patch:
> > 1. introduce SIPI exit reason,
> > 2. introduce wait-for-SIPI state for nVMX,
> > 3. advertise wait-for-SIPI support to guest.
> >
> > When L1 hypervisor is not monitoring Local APIC, L0 need to emulate
> > INIT-VMExit and SIPI-VMExit to L1 to emulate INIT-SIPI-SIPI for L2. L2
> > LAPIC write would be traped by L0 Hypervisor(KVM), L0 should emulate
> > the INIT/SIPI vmexit to L1 hypervisor to set proper state for L2's
> > vcpu state.
> >
> > Handle procdure:
> > Source vCPU:
> > L2 write LAPIC.ICR(INIT).
> > L0 trap LAPIC.ICR write(INIT): inject a latched INIT event to target
> > vCPU.
> > Target vCPU:
> > L0 emulate an INIT VMExit to L1 if is guest mode.
> > L1 set guest VMCS, guest_activity_state=WAIT_SIPI, vmresume.
> > L0 set vcpu.mp_state to INIT_RECEIVED if (vmcs12.guest_activity_state
> > == WAIT_SIPI).
> >
> > Source vCPU:
> > L2 write LAPIC.ICR(SIPI).
> > L0 trap LAPIC.ICR write(INIT): inject a latched SIPI event to traget
> > vCPU.
> > Target vCPU:
> > L0 emulate an SIPI VMExit to L1 if (vcpu.mp_state == INIT_RECEIVED).
> > L1 set CS:IP, guest_activity_state=ACTIVE, vmresume.
> > L0 resume to L2.
> > L2 start-up.
>
> Again, this looks good but it needs testcases.
>

Hi, Paolo

I saw you queued the testcase patch: https://patchwork.kernel.org/project/kvm/patch/20201013052845.249113-1-yadong.qi@intel.com/
Will you also queue this patch? Or there are some additional comments of this patch?

Best Regard
Yadong


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