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SubjectRe: [PATCH 1/2 v4] MIPS: Ingenic: Fix bugs when detecting X1000's L2 cache.
Date
Hello,

Zhou Yanjie wrote:
> 1.fix bugs when detecting L2 cache sets value.
> 2.fix bugs when detecting L2 cache ways value.

Series applied to mips-next.

Thanks,
Paul

[ This message was auto-generated; if you believe anything is incorrect
then please email paul.burton@mips.com to report it. ]

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