Messages in this thread | | | Date | Fri, 16 Aug 2019 18:25:40 -0700 (PDT) | From | Paul Walmsley <> | Subject | [GIT PULL] RISC-V updates for v5.3-rc5 |
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Linus,
The following changes since commit d45331b00ddb179e291766617259261c112db872:
Linux 5.3-rc4 (2019-08-11 13:26:41 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv/for-v5.3-rc5
for you to fetch changes up to 69703eb9a8ae28a46cd5bce7d69ceeef6273a104:
riscv: Make __fstate_clean() work correctly. (2019-08-14 13:20:46 -0700)
---------------------------------------------------------------- RISC-V updates for v5.3-rc5
These updates include:
- Two patches to fix significant bugs in floating point register context handling
- A minor fix in RISC-V flush_tlb_page(), to supply a valid end address to flush_tlb_range()
- Two minor defconfig additions: to build the virtio hwrng driver by default (for QEMU targets), and to partially synchronize the 32-bit defconfig with the 64-bit defconfig
---------------------------------------------------------------- Alistair Francis (2): riscv: rv32_defconfig: Update the defconfig riscv: defconfig: Update the defconfig
Paul Walmsley (1): riscv: fix flush_tlb_range() end address for flush_tlb_page()
Vincent Chen (2): riscv: Correct the initialized flow of FP register riscv: Make __fstate_clean() work correctly.
arch/riscv/configs/defconfig | 2 ++ arch/riscv/configs/rv32_defconfig | 3 +++ arch/riscv/include/asm/switch_to.h | 8 +++++++- arch/riscv/include/asm/tlbflush.h | 11 +++++++++-- arch/riscv/kernel/process.c | 11 +++++++++-- 5 files changed, 30 insertions(+), 5 deletions(-)
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