Messages in this thread Patch in this message | | | From | Lukasz Majewski <> | Subject | [PATCH] ARM: DTS: vybrid: Update qspi node description for VF610 BK4 board | Date | Tue, 30 Jul 2019 17:05:52 +0200 |
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Before this change the device tree description of qspi node for second memory on BK4 board was wrong (applicable to old, in-house tunned fsl-quadspi.c driver).
As a result this memory was not recognized correctly when used with the new spi-fsl-qspi.c driver.
From the dt-bindings:
"Required SPI slave node properties: - reg: There are two buses (A and B) with two chip selects each. This encodes to which bus and CS the flash is connected: <0>: Bus A, CS 0 <1>: Bus A, CS 1 <2>: Bus B, CS 0 <3>: Bus B, CS 1"
According to above with new driver the second SPI-NOR memory shall have reg=<2> as it is connected to Bus B, CS 0.
Signed-off-by: Lukasz Majewski <lukma@denx.de> --- arch/arm/boot/dts/vf610-bk4.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/vf610-bk4.dts b/arch/arm/boot/dts/vf610-bk4.dts index 3fa0cbe456db..0f3870d3b099 100644 --- a/arch/arm/boot/dts/vf610-bk4.dts +++ b/arch/arm/boot/dts/vf610-bk4.dts @@ -246,13 +246,13 @@ reg = <0>; }; - n25q128a13_2: flash@1 { + n25q128a13_2: flash@2 { compatible = "n25q128a13", "jedec,spi-nor"; #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <66000000>; spi-rx-bus-width = <2>; - reg = <1>; + reg = <2>; }; }; -- 2.11.0
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