Messages in this thread | | | Subject | Re: [PATCH v5 1/3] mtd: spi-nor: add support for is25wp256 | From | Vignesh Raghavendra <> | Date | Fri, 21 Jun 2019 11:34:21 +0530 |
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Hi,
On 17/06/19 8:48 PM, Sagar Kadam wrote: > Hello Vignesh, > > Thanks for your review comments. > > On Sun, Jun 16, 2019 at 6:14 PM Vignesh Raghavendra <vigneshr@ti.com> wrote: >> >> Hi, >> >> On 12-Jun-19 4:17 PM, Sagar Shrikant Kadam wrote: >> [...] >> >>> @@ -4129,7 +4137,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, >>> if (ret) >>> return ret; >>> >>> - if (nor->addr_width) { >>> + if (nor->addr_width && JEDEC_MFR(info) != SNOR_MFR_ISSI) { >>> /* already configured from SFDP */ >> >> Hmm, why would you want to ignore addr_width that's read from SFDP table? > > The SFDP table for ISSI device considered here, has addr_width set to > 3 byte, and the flash considered > here is 32MB. With 3 byte address width we won't be able to access > flash memories higher address range.
Is it specific to a particular ISSI part as indicated here[1]? If so, please submit solution agreed there i.e. use spi_nor_fixups callback
[1]https://patchwork.ozlabs.org/patch/1056049/
> Hence I have ignored the addr width from SFDP. I have verified that > with 3 byte address width, the > flascp util fails while verifying the written data. Please let me > know your views on this? > If this affects multiple ISSI parts then: Instead of checking for mfr code, look for SNOR_F_4B_OPCODES flag in flash_info struct of the device and let it take precedence over SFDP in case size is over 16MB
Regards Vignesh
> BR, > Sagar Kadam > >> Regards >> Vignesh >> >> >>> } else if (info->addr_width) { >>> nor->addr_width = info->addr_width; >>> diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h >>> index b3d360b..ff13297 100644 >>> --- a/include/linux/mtd/spi-nor.h >>> +++ b/include/linux/mtd/spi-nor.h >>> @@ -19,6 +19,7 @@ >>> #define SNOR_MFR_ATMEL CFI_MFR_ATMEL >>> #define SNOR_MFR_GIGADEVICE 0xc8 >>> #define SNOR_MFR_INTEL CFI_MFR_INTEL >>> +#define SNOR_MFR_ISSI 0x9d /* ISSI */ >>> #define SNOR_MFR_ST CFI_MFR_ST /* ST Micro */ >>> #define SNOR_MFR_MICRON CFI_MFR_MICRON /* Micron */ >>> #define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX >>>
-- Regards Vignesh
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