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Subject[PATCH 1/1] perf/x86/intel: make error messages less confusing
Date
On a system with X86_FEATURE_ARCH_PERFMON disabled
and with a model not known by family PMU drivers,
user gets a kernel message log like the following:
[ 0.100114] Performance Events: unsupported p6 CPU model 85 no PMU driver, software events only.

The "unsupported .. CPU" part may be confusing for some
users. Rewording the messages on the failure path to:
[ 0.667154] Performance Events: unknown p6 PMU on CPU model 85: !X86_FEATURE_ARCH_PERFMON: no PMU driver, software events only.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Dan Carpenter <dan.carpenter@oracle.com>
Cc: Eduardo Valentin <eduval@amazon.com>
Cc: Jia Zhang <qianyue.zj@alibaba-inc.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-kernel@vger.kernel.org
Reported-by: Matt Wilson <msw@amazon.com>
Signed-off-by: Eduardo Valentin <eduval@amazon.com>
---
arch/x86/events/intel/core.c | 15 +++++++++++----
arch/x86/events/intel/p4.c | 2 +-
arch/x86/events/intel/p6.c | 3 ++-
3 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 86f0c15dcc2d..b57a16997ee6 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3884,15 +3884,22 @@ __init int intel_pmu_init(void)
char *name;

if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON)) {
+ int ret = -ENODEV;
+
switch (boot_cpu_data.x86) {
case 0x6:
- return p6_pmu_init();
+ ret = p6_pmu_init();
+ break;
case 0xb:
- return knc_pmu_init();
+ ret = knc_pmu_init();
+ break;
case 0xf:
- return p4_pmu_init();
+ ret = p4_pmu_init();
+ break;
}
- return -ENODEV;
+ if (ret)
+ pr_cont(" !X86_FEATURE_ARCH_PERFMON: ");
+ return ret;
}

/*
diff --git a/arch/x86/events/intel/p4.c b/arch/x86/events/intel/p4.c
index d32c0eed38ca..963d2b0600f6 100644
--- a/arch/x86/events/intel/p4.c
+++ b/arch/x86/events/intel/p4.c
@@ -1346,7 +1346,7 @@ __init int p4_pmu_init(void)

rdmsr(MSR_IA32_MISC_ENABLE, low, high);
if (!(low & (1 << 7))) {
- pr_cont("unsupported Netburst CPU model %d ",
+ pr_cont("unknown Netburst PMU on CPU model %d: ",
boot_cpu_data.x86_model);
return -ENODEV;
}
diff --git a/arch/x86/events/intel/p6.c b/arch/x86/events/intel/p6.c
index 408879b0c0d4..221e374299b2 100644
--- a/arch/x86/events/intel/p6.c
+++ b/arch/x86/events/intel/p6.c
@@ -269,7 +269,8 @@ __init int p6_pmu_init(void)
break;

default:
- pr_cont("unsupported p6 CPU model %d ", boot_cpu_data.x86_model);
+ pr_cont("unknown p6 PMU on CPU model %d: ",
+ boot_cpu_data.x86_model);
return -ENODEV;
}

--
2.18.0
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