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SubjectRe: [PATCH v7 2/7] thermal: tsens: Add support to split up register address space into two
Hi,

On Thu, Jul 12, 2018 at 1:39 AM, Amit Kucheria <amit.kucheria@linaro.org> wrote:
> There are two banks of registers for v2 TSENS IPs: SROT and TM. On older
> SoCs these were contiguous, leading to DTs mapping them as one register
> address space of size 0x2000. In newer SoCs, these two banks are not
> contiguous anymore.
>
> Add logic to init_common() to differentiate between old and new DTs and
> adjust associated offsets for the TM register bank so that the old DTs will
> continue to function correctly.
>
> Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Tested-by: Matthias Kaehlcke <mka@chromium.org>
> ---
> drivers/thermal/qcom/tsens-8996.c | 4 ++--
> drivers/thermal/qcom/tsens-common.c | 12 ++++++++++++
> drivers/thermal/qcom/tsens.h | 1 +
> 3 files changed, 15 insertions(+), 2 deletions(-)

Reviewed-by: Douglas Anderson <dianders@chromium.org>
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