Messages in this thread | | | Date | Thu, 9 Feb 2017 09:35:13 +0800 | From | kbuild test robot <> | Subject | [tip:WIP.sched/core 138/170] arch/mips/sibyte/sb1250/smp.c:114:11: note: in expansion of macro '__KSTK_TOS' |
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tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.sched/core head: abfce7e8f232d855fa00a60a1c432be71e074b65 commit: a7620f41ee0afaa7e0e34227fd5a80e5df14b1f4 [138/170] sched/headers: Split <linux/sched/task_stack.h> out of <linux/sched.h> config: mips-sb1250_swarm_defconfig (attached as .config) compiler: mips64-linux-gnuabi64-gcc (Debian 6.1.1-9) 6.1.1 20160705 reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout a7620f41ee0afaa7e0e34227fd5a80e5df14b1f4 # save the attached .config to linux build tree make.cross ARCH=mips
All warnings (new ones prefixed by >>):
In file included from arch/mips/include/asm/thread_info.h:15:0, from include/linux/thread_info.h:25, from include/asm-generic/preempt.h:4, from ./arch/mips/include/generated/asm/preempt.h:1, from include/linux/preempt.h:80, from include/linux/interrupt.h:8, from arch/mips/sibyte/sb1250/smp.c:21: arch/mips/sibyte/sb1250/smp.c: In function 'sb1250_boot_secondary': arch/mips/include/asm/processor.h:384:41: error: implicit declaration of function 'task_stack_page' [-Werror=implicit-function-declaration] #define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + \ ^ >> arch/mips/sibyte/sb1250/smp.c:114:11: note: in expansion of macro '__KSTK_TOS' __KSTK_TOS(idle), ^~~~~~~~~~ cc1: some warnings being treated as errors
vim +/__KSTK_TOS +114 arch/mips/sibyte/sb1250/smp.c
^1da177e4 Linus Torvalds 2005-04-16 15 * along with this program; if not, write to the Free Software ^1da177e4 Linus Torvalds 2005-04-16 16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ^1da177e4 Linus Torvalds 2005-04-16 17 */ ^1da177e4 Linus Torvalds 2005-04-16 18 ^1da177e4 Linus Torvalds 2005-04-16 19 #include <linux/init.h> ^1da177e4 Linus Torvalds 2005-04-16 20 #include <linux/delay.h> ^1da177e4 Linus Torvalds 2005-04-16 @21 #include <linux/interrupt.h> ^1da177e4 Linus Torvalds 2005-04-16 22 #include <linux/smp.h> ^1da177e4 Linus Torvalds 2005-04-16 23 #include <linux/kernel_stat.h> 184748cc5 Peter Zijlstra 2011-04-05 24 #include <linux/sched.h> ^1da177e4 Linus Torvalds 2005-04-16 25 ^1da177e4 Linus Torvalds 2005-04-16 26 #include <asm/mmu_context.h> ^1da177e4 Linus Torvalds 2005-04-16 27 #include <asm/io.h> 87353d8ac Ralf Baechle 2007-11-19 28 #include <asm/fw/cfe/cfe_api.h> ^1da177e4 Linus Torvalds 2005-04-16 29 #include <asm/sibyte/sb1250.h> ^1da177e4 Linus Torvalds 2005-04-16 30 #include <asm/sibyte/sb1250_regs.h> ^1da177e4 Linus Torvalds 2005-04-16 31 #include <asm/sibyte/sb1250_int.h> ^1da177e4 Linus Torvalds 2005-04-16 32 ^1da177e4 Linus Torvalds 2005-04-16 33 static void *mailbox_set_regs[] = { 65bda1a95 Maciej W. Rozycki 2005-02-22 34 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_SET_CPU), 65bda1a95 Maciej W. Rozycki 2005-02-22 35 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU) ^1da177e4 Linus Torvalds 2005-04-16 36 }; ^1da177e4 Linus Torvalds 2005-04-16 37 ^1da177e4 Linus Torvalds 2005-04-16 38 static void *mailbox_clear_regs[] = { 65bda1a95 Maciej W. Rozycki 2005-02-22 39 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CLR_CPU), 65bda1a95 Maciej W. Rozycki 2005-02-22 40 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU) ^1da177e4 Linus Torvalds 2005-04-16 41 }; ^1da177e4 Linus Torvalds 2005-04-16 42 ^1da177e4 Linus Torvalds 2005-04-16 43 static void *mailbox_regs[] = { 65bda1a95 Maciej W. Rozycki 2005-02-22 44 IOADDR(A_IMR_CPU0_BASE + R_IMR_MAILBOX_CPU), 65bda1a95 Maciej W. Rozycki 2005-02-22 45 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU) ^1da177e4 Linus Torvalds 2005-04-16 46 }; ^1da177e4 Linus Torvalds 2005-04-16 47 ^1da177e4 Linus Torvalds 2005-04-16 48 /* ^1da177e4 Linus Torvalds 2005-04-16 49 * SMP init and finish on secondary CPUs ^1da177e4 Linus Torvalds 2005-04-16 50 */ 078a55fc8 Paul Gortmaker 2013-06-18 51 void sb1250_smp_init(void) ^1da177e4 Linus Torvalds 2005-04-16 52 { ^1da177e4 Linus Torvalds 2005-04-16 53 unsigned int imask = STATUSF_IP4 | STATUSF_IP3 | STATUSF_IP2 | ^1da177e4 Linus Torvalds 2005-04-16 54 STATUSF_IP1 | STATUSF_IP0; ^1da177e4 Linus Torvalds 2005-04-16 55 ^1da177e4 Linus Torvalds 2005-04-16 56 /* Set interrupt mask, but don't enable */ ^1da177e4 Linus Torvalds 2005-04-16 57 change_c0_status(ST0_IM, imask); ^1da177e4 Linus Torvalds 2005-04-16 58 } ^1da177e4 Linus Torvalds 2005-04-16 59 87353d8ac Ralf Baechle 2007-11-19 60 /* 87353d8ac Ralf Baechle 2007-11-19 61 * These are routines for dealing with the sb1250 smp capabilities 87353d8ac Ralf Baechle 2007-11-19 62 * independent of board/firmware 87353d8ac Ralf Baechle 2007-11-19 63 */ 87353d8ac Ralf Baechle 2007-11-19 64 87353d8ac Ralf Baechle 2007-11-19 65 /* 87353d8ac Ralf Baechle 2007-11-19 66 * Simple enough; everything is set up, so just poke the appropriate mailbox 87353d8ac Ralf Baechle 2007-11-19 67 * register, and we should be set 87353d8ac Ralf Baechle 2007-11-19 68 */ 87353d8ac Ralf Baechle 2007-11-19 69 static void sb1250_send_ipi_single(int cpu, unsigned int action) 87353d8ac Ralf Baechle 2007-11-19 70 { 87353d8ac Ralf Baechle 2007-11-19 71 __raw_writeq((((u64)action) << 48), mailbox_set_regs[cpu]); 87353d8ac Ralf Baechle 2007-11-19 72 } 87353d8ac Ralf Baechle 2007-11-19 73 48a048fed Rusty Russell 2009-09-24 74 static inline void sb1250_send_ipi_mask(const struct cpumask *mask, 48a048fed Rusty Russell 2009-09-24 75 unsigned int action) 87353d8ac Ralf Baechle 2007-11-19 76 { 87353d8ac Ralf Baechle 2007-11-19 77 unsigned int i; 87353d8ac Ralf Baechle 2007-11-19 78 48a048fed Rusty Russell 2009-09-24 79 for_each_cpu(i, mask) 87353d8ac Ralf Baechle 2007-11-19 80 sb1250_send_ipi_single(i, action); 87353d8ac Ralf Baechle 2007-11-19 81 } 87353d8ac Ralf Baechle 2007-11-19 82 87353d8ac Ralf Baechle 2007-11-19 83 /* 87353d8ac Ralf Baechle 2007-11-19 84 * Code to run on secondary just after probing the CPU 87353d8ac Ralf Baechle 2007-11-19 85 */ 078a55fc8 Paul Gortmaker 2013-06-18 86 static void sb1250_init_secondary(void) 87353d8ac Ralf Baechle 2007-11-19 87 { 87353d8ac Ralf Baechle 2007-11-19 88 extern void sb1250_smp_init(void); 87353d8ac Ralf Baechle 2007-11-19 89 87353d8ac Ralf Baechle 2007-11-19 90 sb1250_smp_init(); 87353d8ac Ralf Baechle 2007-11-19 91 } 87353d8ac Ralf Baechle 2007-11-19 92 87353d8ac Ralf Baechle 2007-11-19 93 /* 87353d8ac Ralf Baechle 2007-11-19 94 * Do any tidying up before marking online and running the idle 87353d8ac Ralf Baechle 2007-11-19 95 * loop 87353d8ac Ralf Baechle 2007-11-19 96 */ 078a55fc8 Paul Gortmaker 2013-06-18 97 static void sb1250_smp_finish(void) ^1da177e4 Linus Torvalds 2005-04-16 98 { d527eef5b Ralf Baechle 2007-10-19 99 extern void sb1250_clockevent_init(void); d527eef5b Ralf Baechle 2007-10-19 100 d527eef5b Ralf Baechle 2007-10-19 101 sb1250_clockevent_init(); ^1da177e4 Linus Torvalds 2005-04-16 102 local_irq_enable(); ^1da177e4 Linus Torvalds 2005-04-16 103 } ^1da177e4 Linus Torvalds 2005-04-16 104 ^1da177e4 Linus Torvalds 2005-04-16 105 /* 87353d8ac Ralf Baechle 2007-11-19 106 * Setup the PC, SP, and GP of a secondary processor and start it 87353d8ac Ralf Baechle 2007-11-19 107 * running! ^1da177e4 Linus Torvalds 2005-04-16 108 */ 078a55fc8 Paul Gortmaker 2013-06-18 109 static void sb1250_boot_secondary(int cpu, struct task_struct *idle) ^1da177e4 Linus Torvalds 2005-04-16 110 { 87353d8ac Ralf Baechle 2007-11-19 111 int retval; 87353d8ac Ralf Baechle 2007-11-19 112 87353d8ac Ralf Baechle 2007-11-19 113 retval = cfe_cpu_start(cpu_logical_map(cpu), &smp_bootstrap, 87353d8ac Ralf Baechle 2007-11-19 @114 __KSTK_TOS(idle), 87353d8ac Ralf Baechle 2007-11-19 115 (unsigned long)task_thread_info(idle), 0); 87353d8ac Ralf Baechle 2007-11-19 116 if (retval != 0) 87353d8ac Ralf Baechle 2007-11-19 117 printk("cfe_start_cpu(%i) returned %i\n" , cpu, retval);
:::::: The code at line 114 was first introduced by commit :::::: 87353d8ac39c52784da605ecbe965ecdfad609ad [MIPS] SMP: Call platform methods via ops structure.
:::::: TO: Ralf Baechle <ralf@linux-mips.org> :::::: CC: Ralf Baechle <ralf@linux-mips.org>
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